1. Technical Field
This specification relates to the monitoring and control of a chemical mechanical polishing process.
2. Description of the Related Art
Sub-quarter micron multi-level metallization is one of the key technologies for the next generation of ultra large-scale integration (ULSI). The multilevel interconnects that lie at the heart of this technology require planarization of interconnect features formed in high aspect ratio apertures, including contacts, vias, trenches and other features. Reliable formation of these interconnect features is very important to the success of ULSI and to the continued effort to increase circuit density and quality on individual substrates and die.
In the fabrication of integrated circuits and other electronic devices, multiple layers of conducting, semiconducting, and dielectric materials are deposited on or removed from a surface of a substrate. Thin layers of conducting, semiconducting, and dielectric materials may be deposited by a number of deposition techniques. Common deposition techniques in modern processing include physical vapor deposition (PVD), also known as sputtering, chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), and electrochemical plating (ECP).
As layers of materials are sequentially deposited and removed, the uppermost surface of the substrate may become non-planar across its surface and require planarization. An example of a non-planar process is the deposition of copper films with an ECP process in which the copper topography simply follows the already existing non-planar topography of the wafer surface, especially for lines wider than 10 microns. Planarizing a surface, or “polishing” a surface, is a process where material is removed from the surface of the substrate to form a generally even, planar surface. Planarization is useful in removing undesired surface topography and surface defects, such as rough surfaces, agglomerated materials, crystal lattice damage, scratches, and contaminated layers or materials. Planarization is also useful in forming features on a substrate by removing excess deposited material used to fill the features and to provide an even surface for subsequent levels of metallization and processing.
Chemical Mechanical Planarization, or Chemical Mechanical Polishing (CMP), is a common technique used to planarize substrates. CMP utilizes a chemical composition, such as slurries or other fluid medium, for selective removal of materials from substrates. In conventional CMP techniques, a substrate carrier or polishing head is mounted on a carrier assembly and positioned in contact with a polishing pad in a CMP apparatus. The carrier assembly provides a controllable pressure to the substrate, thereby pressing the substrate against the polishing pad. The pad is moved relative to the substrate by an external driving force. The CMP apparatus affects polishing or rubbing movements between the surface of the substrate and the polishing pad while dispersing a polishing composition to affect chemical activities and/or mechanical activities and consequential removal of materials from the surface of the substrate.
An objective of CMP is to remove a predictable amount of material while achieving uniform surface topography both within each wafer and from wafer to wafer when performing a batch polishing process.
Therefore, there is a need for a polishing process which accurately and reliably removes a predictable amount of material while achieving uniform surface topography.